One conventional memory element (e.g., a gain cell) may include a planar p-channel metal oxide semiconductor field effect transistor (PFET) coupled to a planar n-channel metal oxide semiconductor field effect transistor (NFET). However, such an orientation of transistors may inefficiently use chip space. Another conventional gain cell may include a vertical NFET coupled to a junction field effect transistor (JFET). However, such a gain cell may require a complex fabrication process. Accordingly, improved gain cells and methods of making and using the same are desired.